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 MC74AC151, MC74ACT151 1-of-8 Decoder/Demultiplexer
The MC74AC151/74ACT151 is a high-speed 8-input digital multiplexer. It provides, in one package, the ability to select one line of data from up to eight sources. The MC74AC151/74ACT151 can be used as a universal function generator to generate any logic function of four variables. Both true and complementary outputs are provided.
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* Outputs Source/Sink 24 mA * ACT151 Has TTL Compatible Inputs
VCC 16 I4 15 I5 14 I6 13 I7 12 S0 11 S1 10 S2 9
16 1
DIP-16 N SUFFIX CASE 648
16
1
SO-16 D SUFFIX CASE 751B
1 I3
2 I2
3 I1
4 I0
5 Z
6 Z
7 E
8 GND
16
1
TSSOP-16 DT SUFFIX CASE 948F
Figure 1. Pinout: 16-Lead Packages Conductors (Top View) PIN ASSIGNMENT
PIN I0-I7 S0-S2 E Z Z FUNCTION Data Inputs Select Inputs Enable Input Data Output Inverted Data Output 16 EIAJ-16 M SUFFIX CASE 966
1
ORDERING INFORMATION
Device MC74AC151N MC74ACT151N MC74AC151D Package PDIP-16 PDIP-16 SOIC-16 SOIC-16 SOIC-16 SOIC-16 TSSOP-16 TSSOP-16 Shipping 25 Units/Rail 25 Units/Rail 48 Units/Rail 48 Units/Rail 2500 Tape & Reel 2500 Tape & Reel 96 Units/Rail 96 Units/Rail
TRUTH TABLE
Inputs E H L L L L L L L L S2 X L L L L H H H H S1 X L L H H L L H H S0 X L H L H L H L H Outputs Z H I0 I1 I2 I3 I4 I5 I6 I7 Z L I0 I1 I2 I3 I4 I5 I6 I7
MC74ACT151D MC74AC151DR2 MC74ACT151DR2 MC74AC151DT MC74ACT151DT MC74AC151DTR2
TSSOP-16 2500 Tape & Reel
MC74ACT151DTR2 TSSOP-16 2500 Tape & Reel MC74AC151M MC74ACT151M EIAJ-16 EIAJ-16 50 Units/Rail 50 Units/Rail
H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial
DEVICE MARKING INFORMATION
See general marking information in the device marking section on page 7 of this data sheet.
(c) Semiconductor Components Industries, LLC, 2006
June, 2006 - Rev. 6
1
Publication Order Number: MC74AC151/D
MC74AC151, MC74ACT151
S0 E S1 S2
I0
I1 I2
I3
I4
I5
I6
I7
Z
Z
Figure 2. Logic Symbol
FUNCTIONAL DESCRIPTION The MC74AC151/74ACT151 is a logic implementation of a single pole, 8-position switch with the switch position controlled by the state of three Select inputs, S0, S1, S2. Both true and complementary outputs are provided. The Enable input (E) is active LOW. When it is not activated, the complementary output is HIGH and the true output is LOW regardless of all other inputs. The logic function provided at the output is:
Z = E*(I0*S0*S1*S2+I1*S0*S1*S2+ I2*S0*S1*S2+I3*S0*S1*S2+ I4*S0*S1*S2+I5*S0*S1*S2+ I6*S0*S1*S2+I7*S0*S1*S2) The MC74AC151/74ACT151 provides the ability, in one package, to select from eight sources of data or control information. By proper manipulation of the inputs, the MC74AC151/74ACT151 can provide any logic function of four variables and its complement.
I2 I3 I4 I5 I6 I7
I0 S2 S1 S0 E
I1
NOTE:
This diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Z
Z
Figure 3. Logic Diagram
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2
MC74AC151, MC74ACT151
MAXIMUM RATINGS*
Symbol VCC VIN VOUT IIN IOUT ICC Tstg Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin DC Output Sink/Source Current, per Pin DC VCC or GND Current per Output Pin Storage Temperature Value -0.5 to +7.0 -0.5 to VCC +0.5 -0.5 to VCC +0.5 20 50 50 -65 to +150 Unit V V V mA mA mA C
*Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions.
RECOMMENDED OPERATING CONDITIONS
Symbol VCC VIN, VOUT tr, tf Supply Voltage DC Input Voltage, Output Voltage (Ref. to GND) Input Rise and Fall Time (Note 1) AC Devices except Schmitt Inputs Input Rise and Fall Time (Note 2) ACT Devices except Schmitt Inputs Junction Temperature (PDIP) Operating Ambient Temperature Range Output Current - High Output Current - Low VCC @ 3.0 V VCC @ 4.5 V VCC @ 5.5 V VCC @ 4.5 V VCC @ 5.5 V Parameter AC ACT Min 2.0 4.5 0 - - - - - - -40 - - Typ 5.0 5.0 - 150 40 25 10 8.0 - 25 - - Max 6.0 5.5 VCC - - - - - 140 85 -24 24 ns/V C C mA mA ns/V Unit V V
tr, tf TJ TA IOH IOL
1. VIN from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times. 2. VIN from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
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3
MC74AC151, MC74ACT151
DC CHARACTERISTICS
74AC Symbol Parameter VCC (V) TA = +25C Typ VIH Minimum High Level Input Voltage Maximum Low Level Input Voltage Minimum High Level Output Voltage 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 5.5 VOL Maximum Low Level Output Voltage 3.0 4.5 5.5 3.0 4.5 5.5 IIN IOLD IOHD ICC Maximum Input Leakage Current Minimum Dynamic Output Current Maximum Quiescent Supply Current 5.5 5.5 5.5 5.5 1.5 2.25 2.75 1.5 2.25 2.75 2.99 4.49 5.49 - - - 0.002 0.001 0.001 - - - - - - - 74AC TA = -40C to +85C Unit Conditions
Guaranteed Limits 2.1 3.15 3.85 0.9 1.35 1.65 2.9 4.4 5.4 2.56 3.86 4.86 0.1 0.1 0.1 0.36 0.36 0.36 0.1 - - 8.0 2.1 3.15 3.85 0.9 1.35 1.65 2.9 4.4 5.4 2.46 3.76 4.76 0.1 0.1 0.1 0.44 0.44 0.44 1.0 75 -75 80 V VOUT = 0.1 V or VCC - 0.1 V VOUT = 0.1 V or VCC - 0.1 V IOUT = -50 A
VIL
V
VOH
V
V
*VIN = VIL or VIH -12 mA IOH -24 mA -24 mA IOUT = 50 A
V
V
*VIN = VIL or VIH 12 mA IOL 24 mA 24 mA VI = VCC, GND VOLD = 1.65 V Max VOHD = 3.85 V Min VIN = VCC or GND
A mA mA A
*All outputs loaded; thresholds on input associated with output under test. Maximum test duration 2.0 ms, one output loaded at a time. NOTE: IIN and ICC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V VCC.
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MC74AC151, MC74ACT151
AC CHARACTERISTICS (For Figures and Waveforms - See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
74AC Symbol Parameter VCC* (V) Min tPLH tPHL tPLH tPHL tPLH tPHL Propagation Delay Sn to Z or Z Propagation Delay Sn to Z or Z Propagation Delay E to Z or Z Propagation Delay E to Z or Z Propagation Delay In to Z or Z Propagation Delay In to Z or Z 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.0 2.5 2.5 2.0 2.5 2.0 1.5 1.5 2.5 1.5 2.5 1.5 TA = +25C CL = 50 pF Typ 11.5 8.5 12 8.5 8.0 6.0 8.5 6.5 9.5 7.0 9.5 7.0 Max 18.0 13.0 18.0 13.0 13.0 10.0 13.0 10.0 14.0 10.5 15.0 11.0 74AC TA = -40C to +85C CL = 50 pF Min 3.0 2.0 2.5 1.5 2.0 1.5 1.5 1.5 2.0 1.5 2.0 1.5 Max 20.0 15.0 20.0 15.0 14.0 11.0 14.0 11.0 15.5 11.0 16.0 12.0 ns ns ns ns ns ns 3-6 3-6 3-6 3-6 3-5 3-5 Unit Fig. No.
*Voltage Range 3.3 V is 3.3 V 0.3 V *Voltage Range 5.0 V is 5.0 V 0.5 V
DC CHARACTERISTICS
74ACT Symbol Parameter VCC (V) TA = +25C Typ VIH VIL VOH Minimum High Level Input Voltage Maximum Low Level Input Voltage Minimum High Level Output Voltage 4.5 5.5 4.5 5.5 4.5 5.5 4.5 5.5 VOL Maximum Low Level Output Voltage 4.5 5.5 4.5 5.5 IIN DICCT IOLD IOHD ICC Maximum Input Leakage Current Additional Max. ICC/Input Minimum Dynamic Output Current Maximum Quiescent Supply Current 5.5 5.5 5.5 5.5 5.5 1.5 1.5 1.5 1.5 4.49 5.49 - - 0.001 0.001 - - - 0.6 - - - 74ACT TA = -40C to +85C Unit Conditions
Guaranteed Limits 2.0 2.0 0.8 0.8 4.4 5.4 3.86 4.86 0.1 0.1 0.36 0.36 0.1 - - - 8.0 2.0 2.0 0.8 0.8 4.4 5.4 3.76 4.76 0.1 0.1 0.44 0.44 1.0 1.5 75 -75 80 V V V VOUT = 0.1 V or VCC - 0.1 V VOUT = 0.1 V or VCC - 0.1 V IOUT = -50 A *VIN = VIL or VIH IOH -24 mA -24 mA IOUT = 50 A *VIN = VIL or VIH IOL 24 mA 24 mA VI = VCC, GND VI = VCC - 2.1 V VOLD = 1.65 V Max VOHD = 3.85 V Min VIN = VCC or GND
V
V
V
A mA mA mA A
*All outputs loaded; thresholds on input associated with output under test. Maximum test duration 2.0 ms, one output loaded at a time.
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5
MC74AC151, MC74ACT151
AC CHARACTERISTICS (For Figures and Waveforms - See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
74ACT Symbol Parameter VCC* (V) Min tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL Propagation Delay Sn to Z Propagation Delay Sn to Z Propagation Delay Sn to Z Propagation Delay Sn to Z Propagation Delay E to Z Propagation Delay E to Z Propagation Delay E to Z Propagation Delay E to Z Propagation Delay In to Z Propagation Delay In to Z Propagation Delay In to Z Propagation Delay In to Z 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 3.5 3.5 3.5 4.0 2.5 2.5 2.5 3.0 3.5 3.5 3.5 4.0 TA = +25C CL = 50 pF Typ - - - - - - - - - - - - Max 15.5 15.5 15 16.5 9.5 9.0 8.5 10.0 11.5 12.0 12.0 12.5 74ACT TA = -40C to +85C CL = 50 pF Min 3.0 3.0 3.0 3.5 2.5 2.5 2.5 2.5 3.0 3.0 3.0 3.0 Max 17.0 16.5 16.5 18.5 10.0 10.0 9.5 10.5 12.5 13.5 13.0 14.0 ns ns ns ns ns ns ns ns ns ns ns ns 3-6 3-6 3-6 3-6 3-6 3-6 3-6 3-6 3-6 3-6 3-6 3-6 Unit Fig. No.
*Voltage Range 5.0 V is 5.0 V 0.5 V
CAPACITANCE
Symbol CIN CPD Input Capacitance Power Dissipation Capacitance Parameter Value Typ 4.5 70 Unit pF pF Test Conditions VCC = 5.0 V VCC = 5.0 V
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6
MC74AC151, MC74ACT151
MARKING DIAGRAMS
DIP-16 MC74AC151N AWLYYWW SO-16 AC151 AWLYWW TSSOP-16 EIAJ-16 74AC151 ALYW
AC 151 ALYW
MC74ACT151N AWLYYWW
ACT151 AWLYWW
ACT 151 ALYW
74ACT151 ALYW
A WL, L YY, Y WW, W
= Assembly Location = Wafer Lot = Year = Work Week
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7
MC74AC151, MC74ACT151
PACKAGE DIMENSIONS
PDIP-16 N SUFFIX 16 PIN PLASTIC DIP PACKAGE CASE 648-08 ISSUE R
9
-A-
16
B
1 8
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. DIM A B C D F G H J K L M S INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0_ 10 _ 0.020 0.040 MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0_ 10 _ 0.51 1.01
F S
C
L
-T- H K G D
16 PL
SEATING PLANE
J TA
M
M
0.25 (0.010)
M
SO-16 D SUFFIX 16 PIN PLASTIC SOIC PACKAGE CASE 751B-05 ISSUE J
-A-
16 9 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A B C D F G J K M P R MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.229 0.244 0.010 0.019
-B-
1 8
P
8 PL
0.25 (0.010)
M
B
S
G F
K C -T-
SEATING PLANE
R
X 45 _
M D
16 PL M
J
0.25 (0.010)
TB
S
A
S
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8
MC74AC151, MC74ACT151
PACKAGE DIMENSIONS
TSSOP-16 DT SUFFIX 16 PIN PLASTIC TSSOP PACKAGE CASE948F-01 ISSUE O
16X K REF
0.10 (0.004) 0.15 (0.006) T U
S
M
TU
S
V
S
K K1
16 9
2X
L/2
J1 B -U-
L
PIN 1 IDENT. 1 8
SECTION N-N J
N 0.15 (0.006) T U
S
0.25 (0.010) M
A -V- N F DETAIL E
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 4.90 5.10 4.30 4.50 --- 1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.18 0.28 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.193 0.200 0.169 0.177 --- 0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.007 0.011 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_
C 0.10 (0.004) -T- SEATING
PLANE
D
G
H
DETAIL E
EIAJ-16 M SUFFIX 16 PIN PLASTIC EIAJ PACKAGE CASE966-01 ISSUE O
16 9
LE Q1 E HE M_ L DETAIL P
1
8
Z
D A VIEW P c
e
b 0.13 (0.005)
M
A1 0.10 (0.004)
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9
EEE CCC EEE CCC
-W-
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). DIM A A1 b c D E e HE L LE M Q1 Z MILLIMETERS MIN MAX --- 2.05 0.05 0.20 0.35 0.50 0.18 0.27 9.90 10.50 5.10 5.45 1.27 BSC 7.40 8.20 0.50 0.85 1.10 1.50 10 _ 0_ 0.70 0.90 --- 0.78 INCHES MIN MAX --- 0.081 0.002 0.008 0.014 0.020 0.007 0.011 0.390 0.413 0.201 0.215 0.050 BSC 0.291 0.323 0.020 0.033 0.043 0.059 10 _ 0_ 0.028 0.035 --- 0.031
MC74AC151, MC74ACT151
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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10
MC74AC151/D


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